The invention relates generally to a process for improving the electrical characteristics of semiconductor devices which employ silicon nitride and/or silicon oxynitride layers.
A typical fabrication sequence of the silicon nitride (or oxynitride) gate dielectric involves: (1) cleaning of Si wafer; (2) forming silicon nitride (or oxynitride) on Si wafer; (3) performing a post-deposition high-temperature anneal in nitrogen or oxygen and typically at temperatures &gt;800.degree. C.; (4) depositing a gate electrode; and (5) performing a post-gate electrode anneal in nitrogen or forming gas, typically between 400.degree. C. and 500.degree. C. A variety of dielectric deposition methods have been used in the past, including APCVD, LPCVD, PECVD, and JVD.
In addition to deposition, the silicon oxynitride mentioned above may be formed by nitridizing a thermal oxide layer at an elevated temperature in N.sub.2 O or NH.sub.3 ambient, or by directly oxidizing Si in an N.sub.2 O ambient, or by reoxidizing a silicon nitride or oxynitride film, etc.
Relative to silicon dioxide, silicon nitride or silicon oxynitride possesses a number of attractive features as a gate dielectric for Field Effect Transistors (FET's), including (1) higher dielectric constant, (2) better barrier against impurity diffusion, and (3) better resistance to radiation damage and hot-carrier damage. Unfortunately, the electrical properties of the silicon/nitride interface are very poor due to the presence of very high densities of interface traps and bulk traps. Therefore, numerous attempts have been made by various research groups over the past 3 decades to improve the electrical properties of the silicon nitride layer and thereby produce FET's which out-perform conventional MOSFET's using silicon dioxide as the gate dielectric. However, none of these efforts has been truly successful.